-- B. Alex Bridges -- ECE-476, Summer '99 -- Lab #04, Problem #01 -- Booth's Algorithm for Twos Complement Multiplication ENTITY Multiply8 IS PORT (Start : INOUT BIT; Done : OUT BIT; M : INOUT BIT_VECTOR(7 DOWNTO 0); Q : INOUT BIT_VECTOR(7 DOWNTO 0); A : INOUT BIT_VECTOR(7 DOWNTO 0)); END Multiply8; ARCHITECTURE behavior OF Multiply8 IS FUNCTION FullAddSub( X : BIT_VECTOR(7 DOWNTO 0); Y : BIT_VECTOR(7 DOWNTO 0); Operation : STRING(1 TO 8) ) RETURN BIT_VECTOR IS VARIABLE Result : BIT_VECTOR(7 DOWNTO 0); CONSTANT n : INTEGER := 8; VARIABLE bcInOut : BIT; BEGIN -- Initial Values Result := "00000000"; -- Full 8-bit Adder IF Operation = "Add " THEN addition : FOR i IN 0 TO n-1 LOOP -- cOut <= ( cIn AND (x XOR y) ) OR (x AND y); -- s <= x XOR y XOR cIn; Result(i) := X(i) XOR Y(i) XOR bcInOut; bcInOut := ( bcInOut AND (X(i) XOR Y(i)) ) OR (X(i) AND Y(i)); END LOOP addition; -- Full 8-bit Subtractor ELSIF Operation = "Subtract" THEN subtraction : FOR i IN 0 TO n-1 LOOP -- bOut <= (NOT x AND (y OR bIn) ) OR (y AND bIn); -- d <= x XOR y XOR bIn; Result(i) := X(i) XOR Y(i) XOR bcInOut; bcInOut := (NOT X(i) AND (Y(i) OR bcInOut) ) OR (Y(i) AND bcInOut); END LOOP subtraction; END IF; RETURN Result; END FullAddSub; SIGNAL TempM : BIT_VECTOR(7 DOWNTO 0); SIGNAL TempQ : BIT_VECTOR(7 DOWNTO 0); SIGNAL TempA : BIT_VECTOR(7 DOWNTO 0); SIGNAL DropBit : BIT; -- Q(-1) SIGNAL CarryOver : BIT; -- A(0) -> Q(7) SIGNAL Neg : BIT; -- A(7) SIGNAL State : BIT_VECTOR(1 DOWNTO 0); BEGIN main : PROCESS(Start) CONSTANT n : INTEGER := 8; VARIABLE Count : INTEGER; BEGIN Done <= '0'; -- Intial Values A <= "00000000"; DropBit <= '0'; Count := n; -- Copy Ports to Signals TempM <= M; TempQ <= Q; TempA <= A; WHILE Count > 0 LOOP -- Record State State(1) <= TempQ(0); State(0) <= DropBit; -- Check State: A <- A - M IF State = "10" THEN TempA <= FullAddSub(TempA, TempM, "Subtract"); -- Check State: A <- A + M ELSIF State = "01" THEN TempA <= FullAddSub(TempA, TempM, "Add "); END IF; -- Capture Sign Bit IF TempA(7) = '1' THEN Neg <= '1'; ELSE Neg <= '0'; END IF; -- Capture Dropped Bit: Q(-1) IF TempQ(0) = '1' THEN DropBit <= '1'; ELSE DropBit <= '0'; END IF; -- Capture Carry Over Bit: A(0) -> Q(7) IF TempA(0) = '1' THEN CarryOver <= '1'; ELSE CarryOver <= '0'; END IF; -- Shift Right A -- TempA SRL 1 IS TempA; TempA <= '0' & TempA(7 DOWNTO 1); -- Shift Right Q -- TempQ <= TempQ SRL 1; TempQ <= '0' & TempQ(7 DOWNTO 1); -- Restore Sign Bit TempA(7) <= Neg; -- Restore Carry Over Bit TempQ(7) <= CarryOver; Count := Count - 1; END LOOP; -- Copy Signals to Ports M <= TempM; Q <= TempQ; A <= TempA; Start <= '0'; Done <= '1'; END PROCESS main; END behavior;